UPMEM selects Semidynamics RISC-V AI IP for Large Language Model Application

UPMEM selects Semidynamics RISC-V AI IP for Large Language Model Application

Semidynamics, the leading IP company for high performance, AI-enabled, RISC-V processors, is happy to announce that UPMEM has selected Semidynamics as its core provider for its next generation of LPDDR5X Processing In Memory device. The standard RISC-V architecture with the integrated Tensor Unit along with the long latency, data access optimizer named Gazillion, allows a…


Semidynamics, the leading IP company for high performance, AI-enabled, RISC-V processors, is happy to announce that UPMEM has selected Semidynamics as its core provider for its next generation of LPDDR5X Processing In Memory device.

The standard RISC-V architecture with the integrated Tensor Unit along with the long latency, data access optimizer named Gazillion, allows a seamless and efficient integration of any AI or LLM models. The huge internal bandwidth (102.4GB/s) with a low energy data access (1pJ/bit), and the significant processing capabilities (8 TFLOPs FP16/BF16, 16 TOPs int8) will allow model inference at the best industry performance and energy level for a single chip.

Gilles Hamou, CEO of UPMEM, said, “SemiDynamics GenAI compute IP combines the power and efficiency needed for our disruptive Processing In Memory DRAM chips for mobile. We also appreciate their use of RISC-V architecture as well as involvement in the RISC-V eco-system. Our combined technologies provide the only solution to be powerful enough and sufficiently energy and cost effective to compute most generative AI compute on the smartphone.”

Roger Espasa, CEO of Semidynamics, added, “We are very happy to work with UPMEM and to support them with their Process In Memory approach. This is an extremely innovative way to enable deployment of Large Language AI models and we look forward to a long-term partnership with UPMEM.”


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