ASML and Carl Zeiss SMT have outlined an optical architecture for a future generation of extreme ultraviolet lithography systems, proposing a numerical aperture of at least 0.75 to print finer features on semiconductor wafers. The Hyper-NA research builds on equipment already used in advanced chip production, but remains a technical development programme rather than a confirmed commercial scanner launch.
Their researchers set out the optical design in the October 2026 issue of the Journal of Micro/Nanopatterning, Materials, and Metrology, including the changes required in imaging and manufacturing processes. ASML has begun development work, while industry reporting puts a potential operational system around a decade away. That horizon reflects the scale of engineering still required, with no committed launch date or semiconductor factory installation programme.
Existing extreme ultraviolet equipment projects light with a wavelength of 13.5 nanometres onto a resist coating on silicon wafers. A reflective photomask carries the circuit pattern, while precision mirrors direct and reduce the image before exposure. Subsequent development and etching operations turn that optical pattern into structures used during semiconductor manufacture. As circuit features become finer, the quality of the projected image and control of the wafer position place increasingly demanding limits on production.
The ability to print smaller features at the same wavelength depends partly on numerical aperture, which describes the angular range of light the optics collect and focus. Conventional EUV scanners operate at 0.33, and the newer High-NA generation reaches 0.55. Raising that figure to at least 0.75 could provide finer resolution, although the mask, resist and wafer positioning systems would have to reproduce the optical advantage during repeated production exposures.
At the proposed aperture, the researchers are targeting about five nanometres of half-pitch resolution, compared with roughly eight nanometres for High-NA. Half-pitch measures the spacing of a repeating line pattern and should be distinguished from commercial semiconductor node names. Translating the projected image into a completed device also depends on the resist chemistry, dimensional control during etching and the quality of subsequent production steps.
A greater aperture would retain EUV’s established 13.5 nanometre wavelength, allowing parts of the existing light source and material supply system to remain in use. Shorter wavelengths would create difficult changes in mirror reflectivity and multilayer optical coatings. Concentrating development on projection optics offers a different route, although existing equipment and materials would still need to meet substantially tighter tolerances before they could be reused.
Because EUV light is absorbed by transmissive lenses, Carl Zeiss SMT relies on precision mirrors to guide it through the scanner. Larger collection angles would change mirror geometry, coating requirements and the space available for the projection assembly. Maintaining surface accuracy and alignment during operation would place additional demands on component manufacture, mechanical stability and the control of heat within the optical system.
As the aperture rises, the depth of focus decreases, leaving less variation in wafer height before an exposed pattern loses definition. Wafer stages would have to maintain a carefully controlled position while travelling between exposures, with metrology tracking the wafer surface and compensating for deviations. The optical resolution therefore has to be supported by stage movement, focus control and wafer flatness across the area of each exposure.
The larger illumination angles also complicate the photomask, where circuit features are formed in an absorber layer above a reflective multilayer stack. Light interacting with the height and sidewalls of the absorber can shift the position or change the contrast of the projected pattern. Designers would have to model these three-dimensional mask effects and apply appropriate corrections to layouts that respond differently to the incoming illumination.
At the larger angles anticipated for Hyper-NA, polarisation influences how well different feature orientations retain contrast in the projected image. The orientation of the electromagnetic field can favour one pattern while reducing exposure efficiency or the performance of another. Illumination settings would consequently have to balance pattern contrast, available light and the range of structures required on a production wafer.
Once a pattern reaches the wafer, the photoresist must react predictably to a very small quantity of deposited energy and survive the processing that follows. Random variation in exposure and chemical reaction can produce defects or dimensional differences among otherwise identical features. Resist formulation, mask correction and inspection must therefore develop alongside the optics if the higher theoretical resolution is to contribute to usable production yield.
At production scale, the optical improvement will have to translate into usable wafers at an economic cycle time. Finer resolution might remove some multiple patterning steps, but extra focus control, longer exposures or more complex materials could consume part of that saving. The outcome will vary with the number of critical layers, their alignment requirements and the scanner’s availability during continuous manufacture.
Development of High-NA equipment already provides experience in handling reflective masks, measuring wafer position and maintaining large precision optics in a factory environment. Hyper-NA could build on that experience while demanding new projection geometry and tighter process control. The balance between components that can be retained and those requiring redesign will influence both the timetable and the investment needed from equipment suppliers and chipmakers.
Before a commercial system can be evaluated, ASML and Zeiss must demonstrate that the optical design can be built at full scale and operated with suitable stability, illumination efficiency and accuracy. Semiconductor manufacturers would then need evidence of repeatable patterning, acceptable wafer throughput and yield on representative processes. The October research establishes a technical direction beyond High-NA; full equipment qualification and any production launch remain future development stages.
