Keysight certifies RFPro for Intel process nodes

Keysight certifies RFPro for Intel process nodes

Keysight has validated RFPro workflows for Intel’s newest process nodes. Certification covers electromagnetic simulation for Intel 14A and the enhanced Intel 18A P technology.


Keysight Technologies has certified its RFPro electromagnetic design software for Intel Foundry’s Intel 14A and Intel 18A P process technologies, extending validated simulation into the foundry’s latest manufacturing roadmap.

RFPro forms part of Keysight’s Advanced Design System electronic design automation environment. Certification is intended to give radio frequency integrated circuit and mixed signal designers confidence that simulated electromagnetic behaviour reflects the process parameters used when a device is manufactured.

Electromagnetic effects become increasingly difficult to separate from conventional circuit behaviour as frequencies rise, interconnects shrink, and layouts become more densely integrated. Conductors, vias, passive components, transmission lines, grounding structures, and neighbouring features can interact in ways that ideal circuit models do not represent adequately.

A design may meet its electrical targets in schematic simulation but fail to achieve the required gain, loss, impedance, noise, linearity, coupling, or stability after physical layout. Discovering the mismatch after tape out can force a silicon redesign, increasing cost and delaying product introduction.

Certified electromagnetic software is tested against a foundry’s process design information and reference structures. Models, material properties, layer definitions, extraction methods, meshing, and solver behaviour are assessed before customer designs enter production.

Intel 18A P is an enhanced development of Intel 18A, while Intel 14A represents the following generation in the company’s process roadmap. Intel has associated 14A with further development of its RibbonFET gate all around transistor structure and a backside power delivery architecture called PowerDirect.

Backside power delivery separates some power routing functions from signal interconnect on the front of a device. The arrangement can improve density and electrical performance, while introducing new interactions between device structure, power integrity, thermal behaviour, packaging, and design tools.

Radio frequency and mixed signal circuits present additional challenges because analogue functions do not scale in the same way as digital logic. Inductors, transformers, capacitors, transmission structures, and matching networks occupy physical area and remain sensitive to process variation and surrounding geometry.

Accurate simulation allows teams to compare layout alternatives, identify coupling paths, evaluate passive structures, and assess the effect of routing or packaging changes before committing a design to manufacture. Measured silicon remains necessary for final correlation, but earlier analysis can reduce the number of avoidable revisions.

The certification builds on Keysight’s support for Intel 18A and the foundry’s EMIB T advanced packaging technology. Maintaining connected workflows across process generations and packaging options is becoming more important as designers combine multiple dies rather than placing every function on a single piece of silicon.

Chiplets and advanced packages move part of the design problem into die links, bridges, interposers, substrates, power delivery, and thermal management. Electromagnetic verification must therefore extend across boundaries that were previously treated as separate silicon and package domains.

Artificial intelligence accelerators, high performance computing, mobile devices, communications equipment, and other data intensive systems are increasing the sensitivity of complete designs to signal and power integrity. Faster interfaces and greater current density leave less tolerance for coupling, noise, or poorly controlled impedance.

Electronic design automation has consequently become a central part of semiconductor manufacturing rather than a separate software activity. A foundry may possess advanced process equipment, but customers cannot use it effectively without models, libraries, verification tools, intellectual property blocks, and workflows that produce manufacturable layouts.

Tool qualification also forms part of the competitive foundry offer. Designers are more likely to adopt a process where familiar software can be used and where electrical, electromagnetic, thermal, structural, and package analysis can be correlated.

Keysight has also brought guided drop, shock, and vibration assessment into electronic product development, connecting electrical design with mechanical reliability before physical prototypes are built.

That convergence becomes more significant as advanced packages contain larger and more valuable assemblies. Mechanical warpage, thermal cycling, current density, electromagnetic coupling, and package stress can all influence whether a device functions reliably after manufacture and assembly.

Closer integration between solvers can reduce the need to move simplified models between separate engineering teams, although it also increases the importance of controlled data and consistent assumptions. An electromagnetic model using one package geometry will be of limited value if thermal or mechanical analysis is based on another revision.

Certification for Intel 14A and 18A P gives design teams an earlier validated route into those technologies. Correlation across customer designs, package configurations, test structures, and manufactured silicon will determine how effectively the workflow supports first pass results as the nodes move towards wider use.


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