UK Research and Innovation (UKRI) has outlined a £2.4 million funding opportunity for semiconductor hardware security research, with projects expected to use a shared open-source platform to develop and test secure-by-design technologies.
The Engineering and Physical Sciences Research Council (EPSRC) will run the competition, co-funded by the Department for Business, Innovation, Science and Trade. Applications are scheduled to open at 9am on 19 November 2026 and close at 4pm on 14 January 2027. UKRI published the opportunity on 9 November with its status listed as upcoming, so no projects have yet been awarded through this round.
Eligible projects will run for 12 months from 1 April 2027 to 31 March 2028. Their full economic cost may be up to £300,000, with EPSRC normally contributing 80% of that figure, capped at £240,000 per award. Applicants must be based at UK research organisations eligible for EPSRC funding. The total fund is an available programme budget, not a sum already assigned to successful researchers.
A new open-source hardware security research platform will provide reference designs, tools and planned experimental hardware for researchers to develop and assess their approaches against shared technical foundations. Funded teams will also contribute findings to the platform’s design, allowing test methods and security functions to be refined as its architecture develops. The platform is being built alongside the first funding round rather than offered as a fully completed commercial chip-development system.
Protections added at the application or network layer cannot always compensate for hardware weaknesses in the underlying embedded device. A compromised boot process, insecure handling of cryptographic keys or an exploitable hardware interface can undermine later software safeguards. Building security functions into the architecture allows those assumptions to be tested from the earliest stages of development.
The programme’s proposed research areas include vulnerability analysis, attacks and mitigations, security-aware electronic design automation tools, resilient hardware methods, fault detection and tolerance, and techniques for assessing the performance impact of security mechanisms. The call also covers secure in-field updates, high-integrity safety functions and ways of exploiting hardware security properties from software.
Security mechanisms can introduce additional logic, memory use, processing delays and power demand. In industrial controllers, communications equipment and safety-related electronics, such overheads must be assessed against real-time response limits, energy constraints and the need to detect and recover from faults. The call therefore allows work that measures both protection effectiveness and the effect on silicon area, timing and power, so that research outputs can be evaluated in operating context.
For the first round, researchers will be able to use an existing discrete Root of Trust reference design in register-transfer-level form, running it through simulation or on FPGA boards. A root of trust provides foundational functions, such as establishing trusted identity or verifying firmware, upon which other security operations may depend. The strength of those guarantees depends on the implementation, threat model and system integration rather than the name of the mechanism alone.
Researchers may modify the reference design as they develop hardware intellectual property, assessment methods and implementation guidance. UKRI expects those outputs to inform the initial platform architecture ahead of an intended first tape-out. The design and manufacturing stages remain future activities, with no claim that an independently qualified commercial semiconductor has already emerged from the programme.
UKRI also asks applicants to address assurance, interoperability, trust, standards and regulatory requirements that could affect industrial adoption. The European Cyber Resilience Act is among the frameworks identified in the call. Validation in simulation or on a development board will need to be followed by integration and repeatability evidence before particular solutions can be adopted in high-integrity operating environments.
In addition to conventional semiconductor security issues, the scope allows investigation of emerging compute technologies, including mixed analogue and digital neuromorphic architectures. Those systems may present different device behaviours and security assumptions from conventional processor designs, making shared test methods and reference infrastructure potentially useful. The competition has not designated a particular technology as a successful solution in advance.
A second funding opportunity is expected around autumn 2027. UKRI envisages that researchers at that stage may gain access to initial test-chip implementations and a more complex secure system-on-chip reference design, with further work evaluating and improving the platform. Those resources remain planned rather than completed outputs of the first competition.
The first competition closes on 14 January 2027, and UKRI aims to communicate funding decisions by 1 March. Successful projects are scheduled to run from April 2027 to March 2028, supplying test evidence and designs for the evolving platform. Industrial adoption will depend on subsequent hardware implementation, assurance and the availability of manufacturing and integration routes.
