HPC customer engages Sondrel for high end chip design

Sondrel, a leading provider of ultra-complex custom chips, has announced that it has started front end, RTL design and verification work on a high-performance computing (HPC) chip project for a major new customer.

Ollie Jones, Sondrel’s CEO, said, “HPC designs are a key area for Sondrel because they require large, ultra-complex custom chips on advanced nodes, which are our speciality. We have developed the skills, tools and advanced design methodologies to be able to create billion-transistor designs at leading nodes. For example, we have one customer for such designs that has contracted us for the past eight years to work on each generation of its advanced node chips.”

He explained that HPC designs require multicore processors running at maximum clock frequencies and utilising the very latest, coherent Network on Chip (NoC) technology, advanced memory and high bandwidth IO interfaces, so that the chip can deliver the highest possible performance. The coherent NoC enables data to move between processors, memory and IO whilst enabling processors to reliably share and maintain data that they have available in their caches. As a result, the need to access off-chip memory may be significantly reduced, which can introduce latencies that hinder performance.

“HPC is in huge demand for next generation applications that demand tremendous computing power such as AI, scientific modelling, data centres and internet infrastructures,” concluded Jones. “In every case, the key is understanding how to move data around in the optimal way to maximise performance and that is an area where we have world-class expertise and in-house technologies such as our Advanced Modelling Process. This is part of our suite of in-house tools and flows, which have been perfected over many years, and enables us to analyse exactly what is going on inside a chip design to ensure that the data flow is balanced properly and that the processors are not stalled waiting for data. It runs through every stage of the chip design to ‘prove’ that the design meets its specification and performance requirements, which is why we are the partner of choice for these projects as customers can see at every phase that it is on specification and on track.”